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雙極性晶體管

二極管

ESD保護、TVS、濾波和信號調節(jié)ESD保護

MOSFET

氮化鎵場效應晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應用認證產品(AEC-Q100/Q101)

74AUP1G17GS

Low-power Schmitt trigger

The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 0.8 V to 3.6 V

  • CMOS low power dissipation

  • High noise immunity

  • Overvoltage tolerant inputs to 3.6 V

  • Low noise overshoot and undershoot < 10 % of VCC

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

  • Low static power consumption; ICC = 0.9 μA (maximum)

  • Complies with JEDEC standards:

    • JESD8-12 (0.8 V to 1.3 V)

    • JESD8-11 (0.9 V to 1.65 V)

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from -40 ° C to +85 ° C and -40 ° C to +125 ° C

參數類型

型號 VCC (V) Logic switching levels Output drive capability (mA) fmax (MHz) Nr of bits Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Rth(j-c) (K/W) Package name
74AUP1G17GS 0.8?-?3.6 CMOS ± 1.9 70 1 ultra low -40~125 321 215 XSON6

PCB Symbol, Footprint and 3D Model

Model Name 描述

封裝

型號 可訂購的器件編號,(訂購碼(12NC)) 狀態(tài) 標示 封裝 外形圖 回流焊/波峰焊 包裝
74AUP1G17GS 74AUP1G17GS,132
(935292854132)
Active pJ SOT1202
XSON6
(SOT1202)
SOT1202 REFLOW_BG-BD-1
SOT1202_132

環(huán)境信息

型號 可訂購的器件編號 化學成分 RoHS RHF指示符
74AUP1G17GS 74AUP1G17GS,132 74AUP1G17GS rohs rhf rhf
品質及可靠性免責聲明

文檔 (12)

文件名稱 標題 類型 日期
74AUP1G17 Low-power Schmitt trigger Data sheet 2023-07-18
AN11052 Pin FMEA for AUP family Application note 2019-01-09
Nexperia_document_guide_MiniLogic_MicroPak_201808 MicroPak leadless logic portfolio guide Brochure 2018-09-03
SOT1202 3D model for products with SOT1202 package Design support 2023-02-02
aup1g17 74AUP1G17 IBIS model IBIS model 2018-05-25
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 Leaflet 2019-04-12
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT1202 plastic, leadless extremely thin small outline package; 6 terminals; 0.35 mm pitch; 1 mm x 1mm x 0.35 mm body Package information 2022-06-01
SOT1202_132 XSON6; Reel pack for SMD, 7''; Q3/T4 product orientation Packing information 2020-04-21
74AUP1G17GS_Nexperia_Product_Reliability 74AUP1G17GS Nexperia Product Reliability Quality document 2024-06-16
REFLOW_BG-BD-1 Reflow soldering profile Reflow soldering 2021-04-06
MAR_SOT1202 MAR_SOT1202 Topmark Top marking 2013-06-03

支持

如果您需要設計/技術支持,請告知我們并填寫 應答表 我們會盡快回復您。

模型

文件名稱 標題 類型 日期
aup1g17 74AUP1G17 IBIS model IBIS model 2018-05-25
SOT1202 3D model for products with SOT1202 package Design support 2023-02-02

PCB Symbol, Footprint and 3D Model

Model Name 描述

訂購、定價與供貨

型號 Orderable part number Ordering code (12NC) 狀態(tài) 包裝 Packing Quantity 在線購買
74AUP1G17GS 74AUP1G17GS,132 935292854132 Active SOT1202_132 5,000 訂單產品

樣品

作為 Nexperia 的客戶,您可以通過我們的銷售機構訂購樣品。

如果您沒有 Nexperia 的直接賬戶,我們的全球和地區(qū)分銷商網絡可為您提供 Nexperia 樣品支持。查看官方經銷商列表。

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

可訂購部件

型號 可訂購的器件編號 訂購代碼(12NC) 封裝 從經銷商處購買
74AUP1G17GS 74AUP1G17GS,132 935292854132 SOT1202 訂單產品
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