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雙極性晶體管

二極管

ESD保護、TVS、濾波和信號調(diào)節(jié)ESD保護

MOSFET

氮化鎵場效應晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應用認證產(chǎn)品(AEC-Q100/Q101)

74AUP2G58GU

Low-power dual PCB configurable multiple function gate

The 74AUP2G58 is a dual configurable multiple function gate with Schmitt-trigger inputs. Each gate within the device can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND.

This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 0.8 V to 3.6 V

  • High noise immunity

  • Low static power consumption; ICC = 0.9 μA (maximum)

  • Latch-up performance exceeds 100 mA per JESD 78 Class II

  • Inputs accept voltages up to 3.6 V

  • Low noise overshoot and undershoot < 10 % of VCC

  • IOFF circuitry provides partial power-down mode operation

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

參數(shù)類型

型號 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) fmax (MHz) Nr of bits Power dissipation considerations Tamb (°C) Package name
74AUP2G58GU 0.8?-?3.6 CMOS ± 1.9 8.7 70 2 ultra low -40~125 XQFN10

PCB Symbol, Footprint and 3D Model

Model Name 描述

封裝

型號 可訂購的器件編號,(訂購碼(12NC)) 狀態(tài) 標示 封裝 外形圖 回流焊/波峰焊 包裝
74AUP2G58GU 74AUP2G58GUX
(935304479115)
Active aK SOT1160-1
XQFN10
(SOT1160-1)
SOT1160-1 SOT1160-1_115

環(huán)境信息

型號 可訂購的器件編號 化學成分 RoHS RHF指示符
74AUP2G58GU 74AUP2G58GUX 74AUP2G58GU rohs rhf rhf
品質(zhì)及可靠性免責聲明

文檔 (11)

文件名稱 標題 類型 日期
74AUP2G58 Low-power dual PCB configurable multiple function gate Data sheet 2023-07-31
Nexperia_document_guide_MiniLogic_MicroPak_201808 MicroPak leadless logic portfolio guide Brochure 2018-09-03
SOT1160-1 3D model for products with SOT1160-1 package Design support 2019-10-03
aup2g58 74AUP2G58 IBIS model IBIS model 2015-04-02
Nexperia_document_QIC_DualPCB_Configurable_Logic_201712 Dynamically create your own combination logic device Leaflet 2017-12-21
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 Leaflet 2019-04-12
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
XQFN10_SOT1160-1_mk plastic, extremely thin quad flat package; no leads; 10 terminals; 0.4 mm pitch; 1.4 mm x 1.8 mm x 0.5 mm body Marcom graphics 2017-01-28
SOT1160-1 plastic, leadless extremely thin quad flat package; 10 terminals; 0.4 mm pitch; 1.4 mm x 1.8 mm x 0.5 mm body Package information 2022-06-07
SOT1160-1_115 XQFN10; Reel pack for SMD, 7''; Q1/T1 product orientation Packing information 2023-08-31
74AUP2G58GU_Nexperia_Product_Reliability 74AUP2G58GU Nexperia Product Reliability Quality document 2024-06-16

支持

如果您需要設計/技術支持,請告知我們并填寫 應答表 我們會盡快回復您。

模型

文件名稱 標題 類型 日期
aup2g58 74AUP2G58 IBIS model IBIS model 2015-04-02
SOT1160-1 3D model for products with SOT1160-1 package Design support 2019-10-03

PCB Symbol, Footprint and 3D Model

Model Name 描述

訂購、定價與供貨

型號 Orderable part number Ordering code (12NC) 狀態(tài) 包裝 Packing Quantity 在線購買
74AUP2G58GU 74AUP2G58GUX 935304479115 Active SOT1160-1_115 4,000 訂單產(chǎn)品

樣品

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How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

可訂購部件

型號 可訂購的器件編號 訂購代碼(12NC) 封裝 從經(jīng)銷商處購買
74AUP2G58GU 74AUP2G58GUX 935304479115 SOT1160-1 訂單產(chǎn)品
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