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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74AVCH2T45GN

Dual-bit, dual-supply voltage level translator/transceiver; 3?-?state

The 74AVCH2T45 is a dual bit, dual supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA.

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.

The 74AVCH2T45 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.

Features and benefits

  • Wide supply voltage range: 0.8 V to 3.6 V for VCC(A) and VCC(B)

  • High noise immunity

  • Suspend mode

  • Bus hold on data inputs

  • Inputs accept voltages up to 3.6 V

  • Low noise overshoot and undershoot < 10 % of VCC

  • IOFF circuitry provides partial Power-down mode operation

  • Maximum data rates:

    • 500 Mbps (1.8 V to 3.3 V translation)

    • 320 Mbps (< 1.8 V to 3.3 V translation)

    • 320 Mbps (translate to 2.5 V or 1.8 V)

    • 280 Mbps (translate to 1.5 V)

    • 240 Mbps (translate to 1.2 V)

  • Latch-up performance exceeds 100 mA per JESD 78 Class II

  • Complies with JEDEC standards:

    • JESD8-12 (0.8 V to 1.3 V)

    • JESD8-11 (0.9 V to 1.65 V)

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8-B (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3B exceeds 8000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

參數(shù)類型

型號 VCC(A) (V) VCC(B) (V) Logic switching levels Output drive capability (mA) tpd (ns) Nr of bits Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name Category
74AVCH2T45GN 0.8?-?3.6 0.8?-?3.6 CMOS/LVTTL ± 12 2.1 2 very low -40~125 242 11.4 151 XSON8 Bi-directional | Direction controlled

PCB Symbol, Footprint and 3D Model

Model Name 描述

封裝

型號 可訂購的器件編號,(訂購碼(12NC)) 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74AVCH2T45GN 74AVCH2T45GN,115
(935292233115)
Active K5 SOT1116
XSON8
(SOT1116)
SOT1116 REFLOW_BG-BD-1
SOT1116_115

環(huán)境信息

型號 可訂購的器件編號 化學(xué)成分 RoHS RHF指示符
74AVCH2T45GN 74AVCH2T45GN,115 74AVCH2T45GN rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (13)

文件名稱 標(biāo)題 類型 日期
74AVCH2T45 Dual-bit, dual-supply voltage level translator/transceiver; 3?-?state Data sheet 2024-08-12
AN90007 Pin FMEA for AVC family Application note 2018-11-30
AN90063 Questions about package outline drawings Application note 2025-03-12
Nexperia_document_guide_Logic_translators Nexperia Logic Translators Brochure 2021-04-12
Nexperia_document_guide_MiniLogic_MicroPak_201808 MicroPak leadless logic portfolio guide Brochure 2018-09-03
SOT1116 3D model for products with SOT1116 package Design support 2023-02-02
avch2t45 74AVCH2T45 Ibis model IBIS model 2014-10-14
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT1116 plastic, leadless extremely thin small outline package; 8 terminals; 0.3 mm pitch; 1.2 mm x 1 mm x 0.35 mm body Package information 2022-06-02
SOT1116_115 XSON8 ; Reel pack for SMD, 7''; Q1/T1 product orientation Packing information 2020-04-21
74AVCH2T45GN_Nexperia_Product_Reliability 74AVCH2T45GN Nexperia Product Reliability Quality document 2025-03-20
REFLOW_BG-BD-1 Reflow soldering profile Reflow soldering 2021-04-06
MAR_SOT1116 MAR_SOT1116 Topmark Top marking 2013-06-03

支持

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Longevity

The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.


模型

文件名稱 標(biāo)題 類型 日期
avch2t45 74AVCH2T45 Ibis model IBIS model 2014-10-14
SOT1116 3D model for products with SOT1116 package Design support 2023-02-02

PCB Symbol, Footprint and 3D Model

Model Name 描述

訂購、定價(jià)與供貨

型號 Orderable part number Ordering code (12NC) 狀態(tài) 包裝 Packing Quantity 在線購買
74AVCH2T45GN 74AVCH2T45GN,115 935292233115 Active SOT1116_115 5,000 訂單產(chǎn)品

樣品

作為 Nexperia 的客戶,您可以通過我們的銷售機(jī)構(gòu)訂購樣品。

如果您沒有 Nexperia 的直接賬戶,我們的全球和地區(qū)分銷商網(wǎng)絡(luò)可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷商列表。

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

可訂購部件

型號 可訂購的器件編號 訂購代碼(12NC) 封裝 從經(jīng)銷商處購買
74AVCH2T45GN 74AVCH2T45GN,115 935292233115 SOT1116 訂單產(chǎn)品
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