可訂購部件
型號 | 可訂購的器件編號 | 訂購代碼(12NC) | 封裝 | 從經(jīng)銷商處購買 |
---|---|---|---|---|
74HC259BQ-Q100 | 74HC259BQ-Q100,115 | 935298821115 | SOT763-1 | 訂單產(chǎn)品 |
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Click here for more information8-bit addressable latch
The 74HC259-Q100; 74HCT259-Q100 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs A0 to A3. The addressed latch will follow the data input, non-addressed latches will retain their previous states. In memory mode, all latches retain their previous states and are unaffected by the data or address inputs. In the 3-to-8 decoding or demultiplexing mode, the addressed output follows the D input and all other outputs are LOW. In the reset mode, all outputs are forced LOW and unaffected by the data or address inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 2.0 V to 6.0 V
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Complies with JEDEC standards:
Combined demultiplexer and 8-bit latch
Serial-to-parallel capability
Output from each storage bit available
Random (addressable) data entry
Easily expandable
Common reset input
Useful as a 3-to-8 active HIGH decoder
Input levels:
For 74HC259-Q100: CMOS level
For 74HCT259-Q100: TTL level
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
型號 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
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74HC259BQ-Q100 | 2.0?-?6.0 | CMOS | ± 5.2 | 18 | 8 | low | -40~125 | 89 | 10.8 | 57 | DHVQFN16 |
Model Name | 描述 |
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型號 | 可訂購的器件編號,(訂購碼(12NC)) | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
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74HC259BQ-Q100 | 74HC259BQ-Q100,115 (935298821115) |
Active | HC259 |
DHVQFN16 (SOT763-1) |
SOT763-1 | SOT763-1_115 |
型號 | 可訂購的器件編號 | 化學(xué)成分 | RoHS | RHF指示符 |
---|---|---|---|---|
74HC259BQ-Q100 | 74HC259BQ-Q100,115 | 74HC259BQ-Q100 |
文件名稱 | 標(biāo)題 | 類型 | 日期 |
---|---|---|---|
74HC_HCT259_Q100 | 8-bit addressable latch | Data sheet | 2024-03-11 |
AN11044 | Pin FMEA 74HC/74HCT family | Application note | 2019-01-09 |
SOT763-1 | 3D model for products with SOT763-1 package | Design support | 2019-10-03 |
hc259 | 74HC259 IBIS model | IBIS model | 2022-10-21 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
DHVQFN16_SOT763-1_mk | plastic, dual in-line compatible thermal enhanced very thin quad flat package; 16 terminals; 0.5 mm pitch; 3.5 mm x 2.5 mm x 0.85 mm body | Marcom graphics | 2017-01-28 |
SOT763-1 | plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 16 terminals; 0.5 mm pitch; 3.5 mm x 2.5 mm x 1 mm body | Package information | 2023-05-11 |
SOT763-1_115 | DHVQFN16; Reel pack, SMD, 7" Q1/T1 product orientation | Packing information | 2020-04-21 |
74HC259BQ-Q100_Nexperia_Product_Reliability | 74HC259BQ-Q100 Nexperia Product Reliability | Quality document | 2024-06-16 |
HCT_USER_GUIDE | HC/T User Guide | User manual | 1997-10-31 |
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Model Name | 描述 |
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型號 | Orderable part number | Ordering code (12NC) | 狀態(tài) | 包裝 | Packing Quantity | 在線購買 |
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74HC259BQ-Q100 | 74HC259BQ-Q100,115 | 935298821115 | Active | SOT763-1_115 | 3,000 | 訂單產(chǎn)品 |
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The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.