可訂購(gòu)部件
型號(hào) | 可訂購(gòu)的器件編號(hào) | 訂購(gòu)代碼(12NC) | 封裝 | 從經(jīng)銷商處購(gòu)買 |
---|---|---|---|---|
74LV164BQ-Q100 | 74LV164BQ-Q100X | 935302547115 | SOT762-1 | 訂單產(chǎn)品 |
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Click here for more information8-bit serial-in/parallel-out shift register
The 74LV164-Q100 is an 8-bit edge-triggered shift register with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (DSA or DSB) and either input can be used as an active HIGH enable for data entry through the other input. Both inputs must be connected together or an unused input must be tied HIGH.
Data shifts one place to the right on each LOW-to-HIGH transition of the clock input (CP) and enters into Q0, which is the logical AND-function of the two data inputs (DSA and DSB) that existed one set-up time prior to the rising clock edge.
A LOW on the master reset input (MR) overrides all other inputs and clears the register asynchronously, forcing all outputs LOW.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide operating voltage: 1.0 V to 5.5 V
Optimized for low-voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Typical VOLP (output ground bounce): < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
Typical VOHV (output VOH undershoot): > 2 V at VCC = 3.3 V and Tamb = 25 °C
Gated serial data inputs
Asynchronous master reset
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
型號(hào) | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
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74LV164BQ-Q100 | 1.0?-?5.5 | TTL | ± 12 | 12 | 78 | low | -40~125 | 92 | 9.1 | 58 | DHVQFN14 |
Model Name | 描述 |
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型號(hào) | 可訂購(gòu)的器件編號(hào),(訂購(gòu)碼(12NC)) | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
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74LV164BQ-Q100 | 74LV164BQ-Q100X (935302547115) |
Active | LV164 |
DHVQFN14 (SOT762-1) |
SOT762-1 | SOT762-1_115 |
型號(hào) | 可訂購(gòu)的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
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74LV164BQ-Q100 | 74LV164BQ-Q100X | 74LV164BQ-Q100 |
文件名稱 | 標(biāo)題 | 類型 | 日期 |
---|---|---|---|
74LV164_Q100 | 8-bit serial-in/parallel-out shift register | Data sheet | 2024-01-31 |
SOT762-1 | 3D model for products with SOT762-1 package | Design support | 2019-10-03 |
74lv164 | 74LV164 IBIS model | IBIS model | 2017-10-21 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
DHVQFN14_SOT762-1_mk | plastic, dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; 0.5 mm pitch; 2.5 mm x 3 mm x 0.85 mm body | Marcom graphics | 2017-01-28 |
SOT762-1 | plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 14 terminals; 0.5 mm pitch; 2.5 x 3 x 1 mm body | Package information | 2023-04-05 |
SOT762-1_115 | DHVQFN14; Reel pack for SMD, 7"; Q1/T1 product orientation | Packing information | 2020-04-21 |
74LV164BQ-Q100_Nexperia_Product_Reliability | 74LV164BQ-Q100 Nexperia Product Reliability | Quality document | 2024-06-16 |
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Model Name | 描述 |
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型號(hào) | Orderable part number | Ordering code (12NC) | 狀態(tài) | 包裝 | Packing Quantity | 在線購(gòu)買 |
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74LV164BQ-Q100 | 74LV164BQ-Q100X | 935302547115 | Active | SOT762-1_115 | 3,000 | 訂單產(chǎn)品 |
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The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.