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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號(hào)調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場(chǎng)效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車(chē)應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74LVC1G74GT-Q100

Single D-type flip-flop with set and reset; positive edge trigger

The 74LVC1G74?-?Q100 is a single positive edge triggered D?-?type flip?-?flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D?-?input that meets the set?-?up and hold time requirements on the LOW?-?to?-?HIGH clock transition will be stored in the flip?-?flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt?-?trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range from 1.65 V to 5.5 V

  • Overvoltage tolerant inputs to 5.5 V

  • High noise immunity

  • ±24 mA output drive (VCC = 3.0 V)

  • CMOS low power consumption

  • Direct interface with TTL levels

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 250 mA

  • Complies with JEDEC standard:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8-B/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

參數(shù)類(lèi)型

型號(hào) VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) fmax (MHz) Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name
74LVC1G74GT-Q100 1.65?-?5.5 CMOS/LVTTL ± 32 3.5 280 low -40~125 339 6.8 166 XSON8

PCB Symbol, Footprint and 3D Model

Model Name 描述

封裝

型號(hào) 可訂購(gòu)的器件編號(hào),(訂購(gòu)碼(12NC)) 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74LVC1G74GT-Q100 74LVC1G74GT-Q100X
(935299297115)
Active V74 SOT833-1
XSON8
(SOT833-1)
SOT833-1 SOT833-1_115

環(huán)境信息

型號(hào) 可訂購(gòu)的器件編號(hào) 化學(xué)成分 RoHS RHF指示符
74LVC1G74GT-Q100 74LVC1G74GT-Q100X 74LVC1G74GT-Q100 rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (11)

文件名稱(chēng) 標(biāo)題 類(lèi)型 日期
74LVC1G74_Q100 Single D-type flip-flop with set and reset; positive?edge?trigger Data sheet 2024-08-09
AN11009 Pin FMEA for LVC family Application note 2019-01-09
Nexperia_document_guide_MiniLogic_MicroPak_201808 MicroPak leadless logic portfolio guide Brochure 2018-09-03
SOT833-1 3D model for products with SOT833-1 package Design support 2021-01-28
lvc1g74 74LVC1G74 IBIS model IBIS model 2014-10-20
Nexperia_document_leaflet_Logic_Automotive_MicroPak_solutions_201904 Automotive logic in MicroPak leadless packages Leaflet 2019-04-18
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT833-1 plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 1 mm x 1.95 mm x 0.5 mm body Package information 2022-06-03
SOT833-1_115 XSON8; Reel pack for SMD, 7''; Q1/T1 product orientation Packing information 2020-04-21
74LVC1G74GT-Q100_Nexperia_Product_Reliability 74LVC1G74GT-Q100 Nexperia Product Reliability Quality document 2025-03-20
MAR_SOT833 MAR_SOT833 Topmark Top marking 2013-06-03

模型

文件名稱(chēng) 標(biāo)題 類(lèi)型 日期
lvc1g74 74LVC1G74 IBIS model IBIS model 2014-10-20
SOT833-1 3D model for products with SOT833-1 package Design support 2021-01-28

PCB Symbol, Footprint and 3D Model

Model Name 描述

訂購(gòu)、定價(jià)與供貨

型號(hào) Orderable part number Ordering code (12NC) 狀態(tài) 包裝 Packing Quantity 在線購(gòu)買(mǎi)
74LVC1G74GT-Q100 74LVC1G74GT-Q100X 935299297115 Active SOT833-1_115 5,000 訂單產(chǎn)品

樣品

作為 Nexperia 的客戶(hù),您可以通過(guò)我們的銷(xiāo)售機(jī)構(gòu)訂購(gòu)樣品。

如果您沒(méi)有 Nexperia 的直接賬戶(hù),我們的全球和地區(qū)分銷(xiāo)商網(wǎng)絡(luò)可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷(xiāo)商列表。

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

可訂購(gòu)部件

型號(hào) 可訂購(gòu)的器件編號(hào) 訂購(gòu)代碼(12NC) 封裝 從經(jīng)銷(xiāo)商處購(gòu)買(mǎi)
74LVC1G74GT-Q100 74LVC1G74GT-Q100X 935299297115 SOT833-1 訂單產(chǎn)品
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