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雙極性晶體管

二極管

ESD保護、TVS、濾波和信號調(diào)節(jié)ESD保護

MOSFET

氮化鎵場效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認證產(chǎn)品(AEC-Q100/Q101)

74LVC1G80GX

Single D-type flip-flop; positive-edge trigger

The 74LVC1G80 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and its complement will appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 1.65 V to 5.5 V

  • Overvoltage tolerant inputs to 5.5 V

  • High noise immunity

  • ±24 mA output drive (VCC = 3.0 V)

  • CMOS low power dissipation

  • Direct interface with TTL levels

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 250 mA

  • Complies with JEDEC standard:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD36 (4.5 V to 5.5 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C.

參數(shù)類型

型號 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) fmax (MHz) Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name
74LVC1G80GX 1.65?-?5.5 CMOS/LVTTL ± 32 2.4 450 low -40~125 327 94.5 195 X2SON5

封裝

型號 可訂購的器件編號,(訂購碼(12NC)) 狀態(tài) 標示 封裝 外形圖 回流焊/波峰焊 包裝
74LVC1G80GX 74LVC1G80GX,125
(935298384125)
Active VT SOT1226-3
X2SON5
(SOT1226-3)
SOT1226-3 SOT1226-3_125

環(huán)境信息

型號 可訂購的器件編號 化學(xué)成分 RoHS RHF指示符
74LVC1G80GX 74LVC1G80GX,125 74LVC1G80GX rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (8)

文件名稱 標題 類型 日期
74LVC1G80 Single D-type flip-flop; positive-edge trigger Data sheet 2024-11-12
SOT1226-3 3D model for products with SOT1226-3 package Design support 2021-01-28
lvc1g80 74LVC1G80 IBIS model IBIS model 2014-10-20
Nexperia_document_leaflet_Logic_X2SON_packages_062018 X2SON ultra-small 4, 5, 6 & 8-pin leadless packages Leaflet 2018-06-05
SOT1226-3 plastic thermal enhanced extremely thin small outline package; no leads;5 terminals; body 0.8 x 0.8 x 0.32 mm Package information 2020-08-27
SOT1226-3_125 X2SON5; Reel pack for SMD, 7''; Q3/T4 product orientation Packing information 2020-05-08
74LVC1G80GX_Nexperia_Product_Reliability 74LVC1G80GX Nexperia Product Reliability Quality document 2024-06-16
lvc lvc Spice model SPICE model 2013-05-07

支持

如果您需要設(shè)計/技術(shù)支持,請告知我們并填寫 應(yīng)答表 我們會盡快回復(fù)您。

模型

文件名稱 標題 類型 日期
lvc1g80 74LVC1G80 IBIS model IBIS model 2014-10-20
lvc lvc Spice model SPICE model 2013-05-07
SOT1226-3 3D model for products with SOT1226-3 package Design support 2021-01-28

訂購、定價與供貨

型號 Orderable part number Ordering code (12NC) 狀態(tài) 包裝 Packing Quantity 在線購買
74LVC1G80GX 74LVC1G80GX,125 935298384125 Active SOT1226-3_125 10,000 訂單產(chǎn)品

樣品

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如果您沒有 Nexperia 的直接賬戶,我們的全球和地區(qū)分銷商網(wǎng)絡(luò)可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷商列表。

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

可訂購部件

型號 可訂購的器件編號 訂購代碼(12NC) 封裝 從經(jīng)銷商處購買
74LVC1G80GX 74LVC1G80GX,125 935298384125 SOT1226-3 訂單產(chǎn)品
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