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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號(hào)調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場(chǎng)效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74HC595DB-Q100

8-bit serial-in, serial or parallel-out shift register with output latches; 3?-?state

The 74HC595-Q100; 74HCT595-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. Data in the storage register appears at the output whenever the output enable input (OE) is LOW. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

此產(chǎn)品已停產(chǎn)

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • 8-bit serial input

  • 8-bit serial or parallel output

  • Storage register with 3-state outputs

  • Shift register with direct clear

  • 100 MHz (typical) shift out frequency

  • Complies with JEDEC standard no. 7A

  • Input levels:

    • For 74HC595-Q100: CMOS level

    • For 74HCT595-Q100: TTL level

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • DHVQFN package with Side-Wettable Flanks enabling Automated Optical Inspection (AOI) of solder joints

Applications

  • Serial-to-parallel data conversion

  • Remote control holding register

封裝

下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。

型號(hào) 可訂購(gòu)的器件編號(hào),(訂購(gòu)碼(12NC)) 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74HC595DB-Q100 74HC595DB-Q100J
(935301656118)
Obsolete no package information

環(huán)境信息

下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。

型號(hào) 可訂購(gòu)的器件編號(hào) 化學(xué)成分 RoHS RHF指示符
74HC595DB-Q100 74HC595DB-Q100J 74HC595DB-Q100 rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (5)

文件名稱 標(biāo)題 類型 日期
74HC_HCT595_Q100 8-bit serial-in, serial or parallel-out shift register with output latches; 3?-?state Data sheet 2024-03-20
AN11044 Pin FMEA 74HC/74HCT family Application note 2019-01-09
hc595 IBIS model of 74HC595 IBIS model 2021-02-02
hc HC/HCT Spice model SPICE model 2022-02-17
HCT_USER_GUIDE HC/T User Guide User manual 1997-10-31

支持

如果您需要設(shè)計(jì)/技術(shù)支持,請(qǐng)告知我們并填寫 應(yīng)答表 我們會(huì)盡快回復(fù)您。

模型

文件名稱 標(biāo)題 類型 日期
hc595 IBIS model of 74HC595 IBIS model 2021-02-02
hc HC/HCT Spice model SPICE model 2022-02-17

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

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