可訂購部件
| 型號(hào) | 可訂購的器件編號(hào) | 訂購代碼(12NC) | 封裝 | 從經(jīng)銷商處購買 |
|---|---|---|---|---|
| 74LVC574ABQ-Q100 | 74LVC574ABQ-Q100X | 935691607115 | SOT764-1 | 訂單產(chǎn)品 |
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Click here for more information74LVC574ABQ-Q100
Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-state
The 74LVC574A-Q100 is an 8?-?bit positive?-?edge triggered D?-?type flip?-?flop with 3?-?state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip?-?flops will store the state of their individual D?-?inputs that meet the set?-?up and hold time requirements on the LOW?-?to?-?HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high?-?impedance OFF?-?state. Operation of the OE input does not affect the state of the flip?-?flops. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Schmitt?-?trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features and benefits
- Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 1.2 to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Overvoltage tolerant inputs to 5.5 V
High-impedance when VCC = 0 V
8-bit positive edge-triggered register
Independent register and 3-state buffer operation
Flow-through pin-out architecture
IOFF circuitry provides partial Power-down mode operation
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
參數(shù)類型
| 型號(hào) | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC574ABQ-Q100 | 1.2?-?3.6 | CMOS/LVTTL | ± 24 | 3.2 | 150 | low | -40~125 | 79 | 9.5 | 50 | DHVQFN20 |
封裝
| 型號(hào) | 可訂購的器件編號(hào)，（訂購碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LVC574ABQ-Q100 | 74LVC574ABQ-Q100X (935691607115) |
Active | LVC574A |
DHVQFN20 (SOT764-1) |
SOT764-1 | SOT764-1_115 |
環(huán)境信息
| 型號(hào) | 可訂購的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74LVC574ABQ-Q100 | 74LVC574ABQ-Q100X | 74LVC574ABQ-Q100 |
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Series
文檔 (7)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74LVC574A_Q100 | Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-state | Data sheet | 2023-11-02 |
| SOT764-1 | 3D model for products with SOT764-1 package | Design support | 2019-10-03 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| DHVQFN20_SOT764-1_mk | plastic, dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 2.5 mm x 4.5 mm x 0.85 mm body | Marcom graphics | 2017-01-28 |
| SOT764-1 | plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 4.5 mm x 2.5 mm x 1 mm body | Package information | 2022-06-21 |
| SOT764-1_115 | DHVQFN20; Reel pack for SMD, 7''; Q1/T1 product orientation | Packing information | 2020-04-21 |
| 74LVC574ABQ-Q100_Nexperia_Product_Reliability | 74LVC574ABQ-Q100 Nexperia Product Reliability | Quality document | 2025-03-20 |
Longevity
The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.
模型
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| SOT764-1 | 3D model for products with SOT764-1 package | Design support | 2019-10-03 |
訂購、定價(jià)與供貨
| 型號(hào) | Orderable part number | Ordering code (12NC) | 狀態(tài) | 包裝 | Packing Quantity | 在線購買 |
|---|---|---|---|---|---|---|
| 74LVC574ABQ-Q100 | 74LVC574ABQ-Q100X | 935691607115 | Active | SOT764-1_115 | 3,000 | 訂單產(chǎn)品 |
樣品
作為 Nexperia 的客戶，您可以通過我們的銷售機(jī)構(gòu)訂購樣品。
如果您沒有 Nexperia 的直接賬戶，我們的全球和地區(qū)分銷商網(wǎng)絡(luò)可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷商列表。
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.
74LVC574ABQ-Q100
Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-state
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