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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號(hào)調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場(chǎng)效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74LV4066PW

Quad bilateral switches

The 74LV4066 is a quad single pole, single throw analog switch. Each switch features two input?/?output terminals (nY and nZ) and an active HIGH enable input (nE). When nE is LOW, the analog switch is turned off. Digital inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.

Features and benefits

  • Wide supply voltage range from 1.0 to 6.0 V

  • CMOS low power dissipation

  • Direct interface with TTL levels

  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

  • Complies with JEDEC standards:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD36 (4.5 V to 5.5 V)

  • Typical VOLP (output ground bounce): < 0.8 V at VCC = 3.3 V and Tamb = 25 °C

  • Very low ON-resistance:

    • 60 Ω (typical) at VCC = 2.0 V

    • 35 Ω (typical) at VCC = 3.0 V

    • 25 Ω (typical) at VCC = 4.5 V

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +80 °C and from -40 °C to +125 °C

參數(shù)類型

型號(hào) Configuration VCC (V) Logic switching levels RON (Ω) RON(FLAT) (Ω) f(-3dB) (MHz) THD (%) Xtalk (dB) Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name
74LV4066PW SPST-NO 1.0?-?6.0 TTL 50 3 180 0.02 -60 very low -40~125 117 1 40.3 TSSOP14

PCB Symbol, Footprint and 3D Model

Model Name 描述

封裝

型號(hào) 可訂購(gòu)的器件編號(hào),(訂購(gòu)碼(12NC)) 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74LV4066PW 74LV4066PW,118
(935175010118)
Active LV4066 SOT402-1
TSSOP14
(SOT402-1)
SOT402-1 SSOP-TSSOP-VSO-WAVE
SOT402-1_118

環(huán)境信息

型號(hào) 可訂購(gòu)的器件編號(hào) 化學(xué)成分 RoHS RHF指示符
74LV4066PW 74LV4066PW,118 74LV4066PW rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

Series

文檔 (9)

文件名稱 標(biāo)題 類型 日期
74LV4066 Quad bilateral switches Data sheet 2024-04-08
SOT402-1 3D model for products with SOT402-1 package Design support 2023-02-02
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
TSSOP14_SOT402-1_mk plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body Marcom graphics 2017-01-28
SOT402-1 plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body Package information 2023-11-07
SOT402-1_118 TSSOP14; Reel pack for SMD, 13"; Q1/T1 product orientation Packing information 2020-04-21
74LV4066PW_Nexperia_Product_Reliability 74LV4066PW Nexperia Product Reliability Quality document 2024-06-16
lv lv Spice model SPICE model 2013-05-07
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

如果您需要設(shè)計(jì)/技術(shù)支持,請(qǐng)告知我們并填寫(xiě) 應(yīng)答表 我們會(huì)盡快回復(fù)您。

模型

文件名稱 標(biāo)題 類型 日期
lv lv Spice model SPICE model 2013-05-07
SOT402-1 3D model for products with SOT402-1 package Design support 2023-02-02

PCB Symbol, Footprint and 3D Model

Model Name 描述

訂購(gòu)、定價(jià)與供貨

型號(hào) Orderable part number Ordering code (12NC) 狀態(tài) 包裝 Packing Quantity 在線購(gòu)買
74LV4066PW 74LV4066PW,118 935175010118 Active SOT402-1_118 2,500 訂單產(chǎn)品

樣品

作為 Nexperia 的客戶,您可以通過(guò)我們的銷售機(jī)構(gòu)訂購(gòu)樣品。

如果您沒(méi)有 Nexperia 的直接賬戶,我們的全球和地區(qū)分銷商網(wǎng)絡(luò)可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷商列表

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

可訂購(gòu)部件

型號(hào) 可訂購(gòu)的器件編號(hào) 訂購(gòu)代碼(12NC) 封裝 從經(jīng)銷商處購(gòu)買
74LV4066PW 74LV4066PW,118 935175010118 SOT402-1 訂單產(chǎn)品
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